Some types of error correction codes, such as Low Density Parity Check (LDPC) codes, are commonly decoded using iterative decoding processes. The intra-order of operations that are performed during decoding iterations is referred to as scheduling.
Various scheduling schemes and configurations for iterative decoding are known in the art. For example, U.S. Pat. No. 8,140,948 describes a decoder and method for iteratively decoding of low-density parity check codes (LDPC) that includes, in a code graph, performing check node decoding by determining messages from check nodes to variable nodes. In the code graph, variable node decoding is performed by determining messages from the variable nodes to the check nodes. The variable node decoding is independent from degree information regarding the variable nodes.
U.S. Pat. No. 9,258,015 describes a method that includes decoding a code word of an Error Correction Code (ECC), which is representable by a set of check equations, by performing a sequence of iterations, such that each iteration involves processing of multiple variable nodes. For one or more selected variable nodes, a count of the check equations that are defined over one or more variables held respectively by the one or more selected variable nodes is evaluated, and, when the count meets a predefined skipping criterion, the one or more selected variable nodes are omitted from a given iteration in the sequence.